Imperas preps fast models of ARM Cortex-A15 processor

Imperas preps fast models of ARM Cortex-A15 processor

SAN JOSE, Calif. – Imperas Software Ltd. (Thame, England), a pioneer of high-level modeling and virtual prototyping, has models of the ARM Cortex-A15 processor in beta and expects them to be available in the first half of 2012. The range of available models, together with Imperas tool and operating system support, is helping platform and software developers debug systems in parallel with SoC design, speeding up and improving system development, the company said.

The company now has about 75 fast processor models covering MIPS, Renesas, ARM and Synopsys's ARC architectures, according to Larry Lapides, vice president of sales at Imperas. The support of the Renesas V850 architecture for microcontrollers has helped Imperas win work in the automotive domain, Lapides said.

OVP processor models are instruction accurate and employ a use a method of just-in-time code transformation to accelerate simulation speeds. The processor models can also be integrated into SystemC/TLM2 based virtual platforms using the native TLM2 interface available with all OVP models. The OVP simulator can also be encapsulated within the Eclipse IDE, enabling easy use for software developers.

In addition to models Imperas offers the Open Virtual Platform (OVP) simulator OVPsim that executes the models. The use of the open-source models, verified to accurately demonstrate the processor behavior, allows users to put together a simulation model of a platform, compile it to an executable, and connect it to a debugger to provide an embedded software development environment before an SoC has been manufactured. This allows software to be run and bugs to be caught, even extending to errors in compilers, the company said.

Simon Davidmann, founder and CEO of Imperas, said that the offering of virtual platforms for processor-FPGA platforms by Altera and Xilinx had helped business as it had validated the high-level modeling concept. "In fact it is our technology in the Xilinx Zynq virtual platform."

Imperas is now also offering the M*SDK set of Eclipse-based debug tools for use with OVPsim and fast processor models. And has validated support for a variety of operating systems running on top of software simulations. The speed of OVPsim makes the running of portions of applications feasible.

OS support now includes: Linux, Nucleus, uC/OS and FreeRTOS amongst others, said Lapides. "And, of course, Android sits on top of Linux, which opens up a broad applications space," said Davidmann.


Related links and articles:

www.imperas.com

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